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Fraun­ho­fer IIS

The Fraunhofer-Gesell­schaft ( cur­rently oper­ates 76 insti­tutes and research insti­tu­tions throughout Ger­many and is the world’s lead­ing applied research organ­iz­a­tion. Around 30 000 employ­ees work with an annual research budget of 2.9 bil­lion euros.

Hard­ware Developer Backend Digital for ASIC and Sys­tem on Chip (SoC)

Working field:

We bring chip design back to Europe!

For a tech­no­lo­gic­ally more inde­pend­ent Europe, we want to develop Fraunhofer IIS into a European IC Design Cen­ter for trus­ted, energy-effi­cient high-speed ICs by 2025. As a lead­ing com­pet­ence cen­ter for digital chip design, we deliver essen­tial cut­ting-edge tech­no­lo­gies in the areas of exas­cale high per­form­ance com­put­ing and trus­ted elec­tron­ics. In addi­tion, we offer soph­ist­ic­ated digital design ser­vices based on RISC-V. Our tar­get cus­tom­ers are design houses, semi­con­ductor man­u­fac­tur­ers, SMEs and sys­tem integ­rat­ors. Poten­tial applic­a­tions are in areas such as high-speed data pro­cessing, block chain or cyber­se­cur­ity. Today, the Integ­rated Digital Sys­tems busi­ness unit devel­ops digital cir­cuits in CMOS tech­no­lo­gies as Sys­tem on Chip, ASIC or IP. This includes the devel­op­ment of the chip archi­tec­ture, its mod­el­ing and veri­fic­a­tion as well as the integ­ra­tion in nano­meter tech­no­lo­gies from 180 nm to smal­ler than 12 nm.

If you want to con­trib­ute to the devel­op­ment of our Chip Design Cen­ter and are enthu­si­astic about micro­elec­tron­ics and the devel­op­ment of digital sys­tems, espe­cially in the front-end, then join our ambi­tious team! With us, your devel­op­ments will become future-rel­ev­ant products.

What you will do
As a Hard­ware Developer Backend Digital you will have the oppor­tun­ity to work in a highly innov­at­ive area as part of an engaged team. You will spe­cify, imple­ment and optim­ize hard­ware com­pon­ents of com­plex SoCs and mixed sig­nal ASICs for high per­form­ance or low power. For this, you will use state-of-the-art design tools for RTL code check­ing, phys­ical logic syn­thesis, tim­ing ana­lysis as well as test integ­ra­tion. In your pro­jects, you will closely work with your col­leagues in front-end design and place&route lay­out. You will also assist with pro­ject plan­ning and effort estim­ates. Fur­ther­more, you are wel­come to take the ini­ti­at­ive for new top­ics and develop them fur­ther.


What you bring to the table
  • Com­pleted sci­entific uni­versity stud­ies
  • Know-how in the field of micro­elec­tron­ics
  • Exper­i­ence with design tools from Cadence, Syn­opsys or Mentor
  • Know­ledge of the hard­ware descrip­tion lan­guages Sys­tem­Ver­i­log, Ver­i­log or VHDL
  • Basic know­ledge of ana­log cir­cuits is an advant­age
  • Good com­mu­nic­a­tion skills, inde­pend­ence and com­mit­ment
  • Very good Eng­lish and good Ger­man lan­guage skills

The pos­i­tion is also suit­able for career starters with pre­vi­ous know­ledge from final thesis, intern­ships or part-time jobs.

What we offer:

What you can expect
  • Flex­ible work­ing hours
  • Open and friendly team work
  • Var­ied tasks with room for cre­ativ­ity
  • Excit­ing sem­inars and events
  • Net­work­ing with sci­ent­ists
  • Act­ive con­tri­bu­tion in applied research
  • Inter­est­ing an innov­at­ive pro­jects

Fraunhofer IIS offers an extremely attract­ive work­ing envir­on­ment in a highly innov­at­ive key industry. You will work in a ded­ic­ated inter­na­tional team with best net­work­ing on ver­sat­ile pro­jects using state-of-the-art tech­no­lo­gies and design tools. This usu­ally involves going through the entire design flow from RTL design to lay­out with state-of-the-art design tools in a high-per­form­ance infra­struc­ture.

Reg­u­lar fur­ther train­ing and the best com­pany equip­ment are just as much a mat­ter of course as a "you" com­pany cul­ture char­ac­ter­ized by col­legi­al­ity and open­ness, a healthy work-life bal­ance and home office options.

The weekly work­ing time is 39 hours. The pos­i­tion is ini­tially lim­ited to 2 years with the aim to extend it sub­sequently. We value and pro­mote the diversity of our employ­ees' skills and there­fore wel­come all applic­a­tions - regard­less of age, gender, nation­al­ity, eth­nic and social ori­gin, reli­gion, ideo­logy, dis­ab­il­ity, sexual ori­ent­a­tion and iden­tity. Severely dis­abled per­sons are given pref­er­ence in the event of equal suit­ab­il­ity. Appoint­ment, remu­ner­a­tion and social secur­ity bene­fits based on the pub­lic-sec­tor col­lect­ive wage agree­ment (TVöD). Addi­tion­ally Fraunhofer may grant per­form­ance-based vari­able remu­ner­a­tion com­pon­ents.

With its focus on devel­op­ing key tech­no­lo­gies that are vital for the future and enabling the com­mer­cial util­iz­a­tion of this work by busi­ness and industry, Fraunhofer plays a cent­ral role in the innov­a­tion pro­cess. As a pion­eer and cata­lyst for ground­break­ing devel­op­ments and sci­entific excel­lence, Fraunhofer helps shape soci­ety now and in the future.

How to apply:

Inter­ested? Apply online now ( We look for­ward to get­ting to know you!

Fraunhofer-Insti­tute for Integ­rated Cir­cuits IIS

Requisition Num­ber: 3202 Applic­a­tion Dead­line: none Loc­a­tion: Erlan­gen